Memory Validation Engineer, DRAM (DDR-1,2,3, SDR)/Flash (CF,SD,USB,SSD)
Worked in the Engineering and Manufacturing Division for development and testing of DRAM and Flash products improving the yield and manufacturing techniques

Lead the efforts for setting up a Validation infrastructure from scratch with efficient inter department communication along with the Assembly Lines and team building activities. This led to increase in yield by 5 % every 6 months, more efficient and better designs with 20 % less failures.

• System Validation : Did JEDEC compliance testing of memory protocols, Memory Controller, Memory Subsystems & Memory I/O making sure designs are meeting specs with signal measurements

• Functional Testing : Did functional testing for DIMM modules (RDIMM/SODIMM/UDIMM) using module tester with config. Testing (page length, checksum, read/write & data selection) & pattern testing (pattern write/read, data/address lines, DQM ) and

• Automation Infrastructure Development : Developed a test automation framework using C and Python on a unix platform for system validation and nightly regressions. The tests included CTCS/overclock tests across voltages. Developed test plans to cover all functionalities.

• Yield Improvement : Improved Yield by automating and improving various product engineering/manufacturing processes in assembly lines

• Simulations : Ran simulations to optimize power integrity using PIStream with changing capacitor/component

• Failure Analysis : Did RMA testing, working with customers to reproduce failure, debug, & generate FAR‘s

• Inventory Management : Created BOMs, engineering & manufacturing datasheets and did inventory management with Microsoft Dynamics AX